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The present method is setting different oscillation frequencies for the four oscillators. If there can scan the channels one by one , it might be better for the system to solve the problem, and it can provides better flexibility to choose the most suitable frequency Under different external environment. 19 2008 International Conference on Intelligent Computation Technology and Automation Design of Minimum SOPC System Board Xiong Guohai 12 Dong Fangmin 12 Liu Yong 12 1. Institute of Intelligent Vision and Image Information, China Three Gorges University, Yichang 443002, China 2.
4] A. , 1983, 19: 1030-1031.  A. Fabre, “Translinear current conveyor implementation,” Int. J. , 1985, 59: 619-623. cn Abstract 2. the realize of the all digital DC/DC controllers The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. Based on the FPGA platform, The theoretical analysis, characteristics, simulation and design consideration are given. The methods to implement the digital DC/DC Converters have been researched. The function module, state machine of digital DC/DC controller and high resolution DPWM with SigmaDelta dither has been introduced.
1 The structure of the all digital DC/DC Converter In the experiment system, the Fundamental clock frequency of the DPWM and Controller is 80MHz. It is given by the internal PLL of the FPGA. The outer Crystal oscillator generates a frequency of 50MHz, after the PLL, it was speed up to 80MHz. The 11 frequency of the ADC is 20MHz, which is generated by divided the Fundamental clock by 4. Assume the switching frequency is 300KHz, the maximum input voltage is Vin=22V, the output Voltage is Vout=5V, duty is D and the resolution of the DPWM is N.